The result of my testing is displayed on this page.
Written by KAZ' 24-Apr-00
Equipment used for these test | |
Processor | Intel Pentium III 533EB (SL3VA) FCPGA (Vcore:1.60V) |
Daughter Board | MSI MS-6905 Master |
Cooling | Retail Fun *1 |
Benchmark test | SuperPI 104 |
Operating System | Windouws NT4.0(+SP4) |
System One | Asus P3B-F revision 1.03 (Remodeled)*2 |
System Two | Abit BH6 revision 1.2 (Remodeled) with EX-33ADP-II *3 |
*1 The temperature of the room the tests were
run in was 22-24 degrees Celsius. *2 Limit FSB clock of this system is 178MHz. *3 Limit FSB clock of this system is 201MHz. |
Attention |
The results displayed
here tested only 1 piece from each product. You might obtain a different result than I have. My tests used a risky high voltage for system and if you run the same tests I have using my methodology you might destroy or damage your system. I am not responsible for anything you do to yourself or your equipment(s) if you try to emulate what I am doing. |
Crucial technology 128 megabyte PC133 CL2 DIMM (CT16M64S4D7E-16T)
This product supports the fastest speed in the standard of PC133. |
The Micron 7E "chip" was soldered on the board which is was created
using a six layer process.May be these chips were manufactured in the second
week of March of 2000.
|
Table of test result
System One | System Two | ||||
SDRAM setting | Vi/o is 3.50V | Vi/o is 3.80V | SDRAM setting | Vi/o is 3.55V | Vi/o is 4.00V |
2-2-2-F | 156MHz(162sec) | 155MHz(163sec) | 2-2-2-F | 158MHz(160sec) | 159MHz(159sec) |
2-2-2-N | 156MHz(165sec) | 156MHz(165sec) | 2-2-2-N | 159MHz(161sec) | 160MHz(160sec) |
2-3-3-N | 158MHz(170sec) | 156MHz(172sec) | 2-3-3-N | 160MHz(168sec) | 162MHz(167sec) |
3-2-2-N | 160MHz(163sec) | 156MHz(167sec) | 3-2-2-N | 167MHz(157sec) | 169MHz(155sec) |
3-3-3-N | 160MHz(171sec) | 156MHz(Oh my god..) | 3-3-3-N | 174MHz(157sec) | 177MHz(155sec) |
The parameter of "SDRAM
setting" is the order of CAS latency,RAS to CAS delay,RAS precharge
time and MA wait state(F:fast N:normal). The numerical value recorded in the table is the highest FSB clock frequency to be able to operate SuperPI successfully and that calculation time. |
None brand 128 megabyte PC133 CL3 DIMM
Table of test result
System One | System Two | ||||
SDRAM setting | Vi/o is 3.50V | Vi/o is 3.80V | SDRAM setting | Vi/o is 3.55V | Vi/o is 4.00V |
2-2-2-F | 155MHz(162sec) | 156MHz(161sec) | 2-2-2-F | MHz(sec) | MHz(sec) |
2-2-2-N | 156MHz(164sec) | 156MHz(165sec) | 2-2-2-N | MHz(sec) | MHz(sec) |
2-3-3-N | 159MHz(167sec) | 159MHz(167sec) | 2-3-3-N | MHz(sec) | MHz(sec) |
3-2-2-N | 157MHz(166sec) | 156MHz(167sec) | 3-2-2-N | MHz(sec) | MHz(sec) |
3-3-3-N | 174MHz(157sec) | 173MHz(158sec) | 3-3-3-N | MHz(sec) | MHz(sec) |
The parameter of "SDRAM
setting" is the order of CAS latency,RAS to CAS delay,RAS precharge
time and MA wait state(F:fast N:normal). The numerical value recorded in the table is the highest FSB clock frequency to be able to operate SuperPI successfully and that calculation time. |
Apacer 128 megabyte PC100 CL2 DIMM
Table of test result
System One | System Two | ||||
SDRAM setting | Vi/o is 3.50V | Vi/o is 3.80V | SDRAM setting | Vi/o is 3.55V | Vi/o is 4.00V |
2-2-2-F | MHz(sec) | MHz(sec) | 2-2-2-F | MHz(sec) | MHz(sec) |
2-2-2-N | MHz(sec) | MHz(sec) | 2-2-2-N | MHz(sec) | MHz(sec) |
2-3-3-N | MHz(sec) | MHz(sec) | 2-3-3-N | MHz(sec) | MHz(sec) |
3-2-2-N | MHz(sec) | MHz(sec) | 3-2-2-N | MHz(sec) | MHz(sec) |
3-3-3-N | MHz(sec) | MHz(sec) | 3-3-3-N | MHz(sec) | MHz(sec) |
The parameter of "SDRAM
setting" is the order of CAS latency,RAS to CAS delay,RAS precharge
time and MA wait state(F:fast N:normal). The numerical value recorded in the table is the highest FSB clock frequency to be able to operate SuperPI successfully and that calculation time. |